RISCV thread

Software Tools: riscv.org/software-tools/
Github: github.com/riscv

What does Jow Forums think of this open source hardware alternative?

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shakti.org.in
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phoronix.com/scan.php?page=news_item&px=RISC-V-Not-All-Open-Yet
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It's neat. Certainly helps establish a base ecosystem that competes with ARM. I've spun off some variants of its ISA for personal projects, but I've yet to see it take off in industry stuff. We either license ARM or develop our own processors at work depending on the need. I could see us incorporating RISC-V down the road, maybe a few years.

Can someone give a quick rundown of this?

I saw linus's video. For what a get it's instruction set is quite small, so maybe it will have an expressive assembly (instead of the pile of shit that is programming x86 or ARM assembly).

RISC-V is exciting, and we might be getting something affordable soon.
shakti.org.in

So excited. Delivered today.

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Remember Patterson and Hennesey? From University? Remember the MIPS example core and ISA they used? This is basically that but side-steps some issues by leaving implementation details out. The goal is a small set of instructions with simple decode logic. That's pretty much what this is.

I'm on the mailing lists but haven't paid much attention, how does this compare to SiFive's offering?

I find the use of Chisel abhorrent. I know it's a separate project, and more capable and well-seasoned designers are using SystemVerilog, but I cannot overstate how bad this FOTM shit is. People try to create abstraction layers for HDLs time and time again, seemingly every year nowadays, and other than MyHDL they all are terrible at being as expressive as VHDL or Verilog. Again, this isn't a knock against RISC-V, just a knock against academia's need to spin out useless projects that inevitably die. The only truly useful abstraction layer I've seen is MATLAB's HDL Coder.

Not sure re: performance but they're meant to be cheap and easy to build into stuff

It is quite small. If you wanted a full featured system like today imagine a motherboard with let's say 20 chips on it. 5 can be dedicated for running x86 code, 5 for graphics processing, 5 for managing pcie connections, 5 for other instructions.
basically you can build them to do what you need them to do specifically... This allows them to do that task much more efficiently than ghettoing together chips like intlel and x86 has done, which are supposed "jack of all trades" though we see how well that is since now we have so many dedicated PCIE things that are used for offloading to do real work.. (GPUs / computing chips/ etc)

That'll be nice. If they can successfully push something out similar to the raspberry pi under $100 with even "close to" the same performance as a SINGLE CORE 700MHz ARM chip of the original pi, they are going to get a lot of people interested & buying.

what can they be used for now? are they basically like advanced rpi's atm? they seem pretty awesome and I hope they're successful

Pretty much anything really, given that the ISA is extensible and you have full control over the microarchitecture specification including co-processors/accelerators, network-on-chip fabric etc. Here's a list of sponsors, note just how many companies are on board from Google to Nvidia:

riscv.org/membership/

>$60
Pretty pricy. How do I build my own?

Also note, while they may not be publicly selling this cores, that doesn't mean they're not using them at the moment in their products or prototypes.

It's not "open source hardware" unless you can make the CPU yourself.

There's a video online of some guy building one out of discrete components. Your other option is to buy an FPGA and either write your own processor or take one of the existing ones (github is littered with them) and just plop it onto the fabric.

Many RISC-V vendors have their implementations available online. You just need an FPGA. Obviously you can't fab your own ASIC. Or rather, it would be very expensive and prone to error. It's also not hard to make your own with some 3rd year knowledge.

Good question. Pricy indeed but if it helps support RISCv I don't mind paying a bit more now. If these threads stick around I will post updates.

$60 is far from pricy..

honestly I don't even want their silicon, I'm fine with just using the ISA for my own purposes because I already have a lot of FPGA equipment. What I do want is their T-shirts. I missed my chance to get some when I was at one of their gatherings in the valley a few years ago. They just need to put up a store I'd order V of them.

you can make anything yourself, just get a FAB bro

sifive.com/products/hifive1/
just bought 1 Jow Forums

should I control my garden's water system with it?

It's an overpowered Arduino, $60 is pricy.

Some disagree and I can understand their mentality. Price wasn't an issue for me personally but also plan on possibly using embedded RISCv a lot.

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Post more FPGA equipment details and pics.

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It's double the price of the original pi with half the performance. not so bad for something so bleeding edge desu

It's also Xilinx stuff, including a Zedboard, an old Spartan 6, a Pynq (only because its qt), and a Genesys Virtex-5
store.digilentinc.com/genesys-virtex-5-fpga-development-board-limited-time-see-genesys2/

I want to get my hands on a PCI-E card next (like a VCU1525, miners are selling them for somewhat cheap because they did a bulk buy) and set up my own many-core RISC-V system (or at least as many cores I can get in there).

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Neat as fuck.

Nice botnet
phoronix.com/scan.php?page=news_item&px=RISC-V-Not-All-Open-Yet

>phoronix.com/scan.php?page=news_item&px=RISC-V-Not-All-Open-Yet
Only because they didn't have the time to develop the other proprietary hardware blocks themselves. If a company or individual really wanted to, they could develop the whole thing themselves based on the specification. That's open enough, and is all RISC-V has ever aimed for.

phoronix.com/scan.php?page=news_item&px=SiFive-Open-Boot-Code-Coming
Keep up.

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Whats the benefit of a RISCV CPU over a POWER9?

The claim is that RISC-V scales (and is also extensible) to targets ranging from low-power embedded devices to HPC data processing clusters. Power appears to be more oriented towards the high end of things with its emphasis on the CAPI interface as its main differentiator.