Why are the Chinese so based?

Attached: 1545151564017.png (713x608, 621K)

Other urls found in this thread:

anandtech.com/show/14333/samsung-announces-3nm-gaa-mbcfet-pdk-version-01
semiengineering.com/transistor-options-beyond-3nm/
twitter.com/NSFWRedditGif

>2022
can't wait just bought a 3700X

How can they fit an entire factory into such a small space?

Bad source didn't do any research. Construction actually starts next year.
>according to the Taiwanese ‘Economic Daily’ report, TSMC’s 3-nanometer factory passed the environmental assessment.
>According to the original scheduling, the world’s first 3-nanometer plant is expected to start construction in 2020 and complete equipment installation in 2021.
>Moreover, it’s expected to be put into operation as early as the end of 2022 and early 2023.

TSMC = Taiwanese company

Attached: 1561044990784.png (600x580, 594K)

chineses are pretty small

Samsung has better 3nm though
anandtech.com/show/14333/samsung-announces-3nm-gaa-mbcfet-pdk-version-01

It's basically one country

also FYI TSMC has started pumping money into R&D for their upcoming 2nm process. Area scaling will continue to improve for years to come.

Attached: c110f266-69e8-44a9-ad81-53711453ec34.png (700x360, 17K)

but why can't the jews do it?

>not using 20 meter
Typical asians, always midget sized

it's called P1280 and it's in research stage

Intel instead of building a simple bulk Fin, which would be the equivalent of a vertical double gate, they built a Fin with three electrical sides. The top of their Fin has extra passes to flatten it out, make it very uniform, and isolate it. Its more complex, harder to fab, especially as you start scaling downward.
They spent the money, and have to eat that shit sandwich for all their money's worth. They've yet to publicly disclose anything post Trigate. They have hinted at pursuing GAAs and other materials like III-Vs, but that was just lip service on a marketing slide. For all we know their 7nm node will still be Trigate and they'll keep lying to investors about yields and ramp up speed.

5nm is already in risk production, based TSMC

They're Taiwanese you double nigger
Also N I C E

>Chinese

Kek
Kek

that'll be pretty exciting then. Thought it was pretty odd for asians to plan that far ahead. Usually they start building before they even get approved.

>Republic of China
>Not Chinese

no vibrants

One China.

Attached: 239830942.png (465x500, 287K)

One Taiwan

Attached: 1469120354519.jpg (750x1246, 110K)

>Taiwan Semiconductor Manufacturing Company
>builds a factory in Taiwan
Why is this news?

Attached: 1516716981410.jpg (600x600, 35K)

because it's a really fucking expensive factory

It's one country, two systems

Which is a polite way to say there's this communist insurgency going on in mainland

but what can you build in a 3 nanometer big factory

Wow the Chinese blowing away all competition just like they blew away all those protesters in the 1989 Tienanmen square crackdown

”3nm" (Its actually 22 but they just started making up numbers because people are stupid.)

>its another mouth breathing retard who has no idea what industry naming conventions are
Dunning Kruger.

*with CIA black budget money

Enjoy your "3nm" chips getting beat by Intels "14mm" chips.

Eat eat your Pooh

Non sequitur, retard. Your lack of basic knowledge on BEOL scaling has absolutely nothing to do with brand fanboyism.

>What are industry naming conventions.
Made up bullshit apparently.

What kind of industry naming convention has every factory making up their own numbers? Shouldn't they be comparable if it's a standard?

More Dunning Kruger. You're just parroting a response like an NPC. Good job.

>still spouting absolute nonsense like a retarded little kid
ASML literally gives presentations on their tooling, and future industry nodes. They know exactly what BEOL, MOL, and FEOL feature sizes can be created with their tooling, and everyone uses their tooling.
Everyone in the industry has been adhering to BEOL metal pitch scaling for node definitions since the early 2000s. Physical gate length stopped being relevant in the late 90s.

>BEOL, MOL, and FEOL
But none of those things will be 3nm on this "3nm” process.

You don't even know what those acronyms mean, you retarded little kid. In current FinFET processes various metrics of the Fin itself do align with process node names. Intel's 10nm process in fact produces a Fin which is about 6-7nm wide.
Don't talk out of your ass. Its pathetic.

>Gets btfo
>UR DUMB KID
>G-gate size doesn't matter.
Cope
Like I said none of those dimensions will be 3nm so why are they calling it 3nm again? Because it sounds good to consumers?

You've been easily refuted on every possible front, retarded little kid. Have fun with your pointless shitposting. I'm sure you'll go far in life.

Hi, this is my first post in the thread.

You have any idea how stupid it is to be making that argument you just made? The guy is saying that 10nm Intel chips don't have 10nm transistors, you disagreed and called him a retard, then told him they're 6-7nm.

Why do retards on this board insist on waving their tiny dicks around like it's going to impress anybody. I have understood everything you've said so far and I can matter of factly say you look like an idiot. Apologize and try posting again like a normal human being, if what you're trying to say matters to you at all.

They are part of the Chinese race, but they specifically aren't China. The reason why people hate China isn't because they're Chinese, it's because of their authoritarian piece of shit government.

Why can Chinks build in their own country, but Burgers can't build in theirs?

If you build the factory in say Texas or Georgia, there won't be unions to deal with. Is it because of environmental regulations or supply chain issue?

You have a sub 90 IQ. Process nodes are not named for a singular feature like gate length. That doesn't mean that FEOL features are massively larger in scale than the process name.
Stop grasping at straws. You're too dumb to have this conversation.

America doesn't have the native workforce to support it, and American labor would have to be paid drastically higher.

Cost of living in Taiwan is lower, there is already a highly educated workforce, they have ready access to materials and technologies specifically needed for electronics production (much of this is a holdover from when the first two points were more pronounced), and they commit capital to staying competitive on a consistent basis.

>retard spouts Dunning Kruger without even realizing that pop-science took the studies way out of context and the popular understanding thereof has no basis in reality

No I'm not, I know everything you've said and you're a fucking idiot who can't communicate worth a damn, even by Jow Forums standards. Do you have any idea how bad that is?

You don't even understand that I don't disagree with you.

>1/2 the size of 14nm+++
>Can't hit more than 4.5ghz
Defend this shit.

rofl

Attached: dio laugh.gif (320x240, 246K)

No, not drastically, just significantly more, especially when setting up a fab since that's rare in the US now.

>Taiwan
>China
Never gonna happen basedboi

let me explain it to you simply. twice as many cores in the same die area.

kek, you fucking chinks need to get gassed. Taiwan is the one true China.

Basedboi, my phone is trying to commit treason.

and some of this shit needs to stop being designed in Israel with soviet era engineers that love their back-doors

American NIMBYism is out of control. Labor unions are not as collaborative. Tax incentives are a must for a corporation but are always seen as cronyism by whichever party is not in power. Any attempt to acquire land is nearly impossible and will opposed at every step. The requisite transport infrastructure will be under-maintained.

Thanks user, don't know why you're still in this place but I sure can't leave at this point.

*ahem*

动态网自由门 天安門 天安门 法輪功 李洪志 Free Tibet 六四天安門事件 The Tiananmen Square protests of 1989 天安門大屠殺 The Tiananmen Square Massacre 反右派鬥爭 The Anti-Rightist Struggle 大躍進政策 The Great Leap Forward 文化大革命 The Great Proletarian Cultural Revolution 人權 Human Rights 民運 Democratization 自由 Freedom 獨立 Independence 多黨制 Multi-party system 台灣 臺灣 Taiwan Formosa 中華民國 Republic of China 西藏 土伯特 唐古特 Tibet 達賴喇嘛 Dalai Lama 法輪功 Falun Dafa 新疆維吾爾自治區 The Xinjiang Uyghur Autonomous Region 諾貝爾和平獎 Nobel Peace Prize 劉暁波 Liu Xiaobo 民主 言論 思想 反共 反革命 抗議 運動 騷亂 暴亂 騷擾 擾亂 抗暴 平反 維權 示威游行 李洪志 法輪大法 大法弟子 強制斷種 強制堕胎 民族淨化 人體實驗 肅清 胡耀邦 趙紫陽 魏京生 王丹 還政於民 和平演變 激流中國 北京之春 大紀元時報 九評論共産黨 獨裁 專制 壓制 統一 監視 鎮壓 迫害 侵略 掠奪 破壞 拷問 屠殺 活摘器官 誘拐 買賣人口 遊進 走私 毒品 賣淫 春畫 賭博 六合彩 天安門 天安门 法輪功 李洪志 Winnie the Pooh 劉曉波动态网自由门

WTF?? S O Y B O I??!?!

Why not just make a 1nm factory, what a bunch of plebs.

ICs have to be designed to facilitate high clocks. You can't just port a design to X process and expect to inherit every single quality displayed by their own internal test chips.
The hot buzzword for your normies to read up on is critical path.

>y-your argument is bad
You're too inbred to understand the very simple information being presented, and you chimed in because you have absolutely no filter in that mongoloid brain of yours.

It's not half the size. They just keep making up new standards for how they are named because otherwise it would have been 24nm for the last 10 years.

Loooooool proof that there are cheat codes in meatspace

>Why can Chinks build in their own country, but Burgers can't build in theirs?
see pic

Attached: 1555311561340.png (1357x800, 23K)

>You're too inbred to understand the very simple information being presented

Okay, dude. Did you not have a mother or something? You can't even take a hint to just calm down.

Chinese will call it whatever size you want. You could open up a .007nm factory up tomorrow.

The iq of chinese peasants (~97%) of the country is Africa tier. They don't even have spatial reasoning ability, have to rely on route memorization.

>You dumb no understand.
No part of the chip is 3nm
>But that's what they call it retard don't you understand industry naming conventions?
So it's made up bullshit?

You should improve your rote memorization.

>he can't even route memorize

>hurrr 7nm is actually 22nm! Da names not based on things!
Reality is that conventional FinFET processes in volume production right now have some FEOL features even smaller than the marketing number of the node. The entire industry is following a standardized naming convention thats been consistently followed for about two decades.
>hurrrpp de durrr but nothing will be 3nm next time!

You're literally an animal lower than human.

So how big are the gates on a 14nm process vs a 3nm process?

outdated pic user, fixed it for u

Attached: 1562552236432.png (1357x800, 59K)

Nanomachines, son.

My point exactly, the number is arbitrary and designed to confuse consumers by giving the illusion of progress. Why is this value a number that does not correspond to the sizes of any of the features on the fucking chip?

Lynn is full of shit, follow the link on this pic where they refute his bullshit with actual data.

Attached: ourworldindata_average-iq-by-country-v2.png (2877x1745, 235K)

Attached: 511vs6.jpg (453x641, 37K)

How "big" is a fucking retarded question, user. A FinFET is not a planar structure, and increasing the physical length of them is desirable to increase Weff. You want to combat the short channel effect, not exacerbate it.
If you want to look at the specifics of a given process on the market now all that information is readily available. 3nm GAAs are in R&D phase, and the topology of them again is completely different, so trying to compare feature size between these two things in one dimension is entirely fucking retarded. Of the upcoming GAA class nodes Samsung's 3nm has the most publicly available data as its based on a prior joint venture with IBM, Samsung, and Global Foundries. The first "nanosheet" style GAA structure actually fabbed was a 5nm node.

I'm not wasting my time to dig through white papers to feed a troll.

Attached: rcj_5nm-Nanosheets_1_1496432257.png (1508x1008, 1.39M)

>It's a useful metric! You see if you add these five values together and then divide by the length of a chinese engineers penis you get a rough estimate of blash blah blah.
Sounds like a pretty useless metric to me user. You can't even articulate how it is derived or how it corresponds to performance.
>But the gates being larger is actually a feature!
Cope.

Just keep proving you're clinically retarded. It is mildly amusing.
>short channels effect is good!
lmao You probably think transistors are digital.

Attached: Fin W.png (1097x736, 156K)

> Taiwanese are now Chinese
you stupid dog eating commie. lmao. kys.

>3nm factory

What is this, a factory for ants?

Attached: maxresdefault.jpg (1280x720, 83K)

semiengineering.com/transistor-options-beyond-3nm/

Fun read and relevant to current thread topic.

Attached: nextgenfig5.png (1195x647, 467K)

but intel is still on 14nm?

CHINA IS PART OF TAIWAN

It's been confirmed that 5nm EUV will bring an 80% increase in density over 7nm base. Which is basically a near full die shrink level of density on a half-shrink node. So 3nm EUV will essentially be a 2x increase in density over 7nm base, which is what Zen2 debuted on.

This means that you'd be able to quadruple the number of cores and threads on package for AM5 or AM6. AMD can still maintain an 8c/16t chiplet at 3nm and stack 4 of them connected to an IO die on the socket for desktop space giving you 32c/64t capabilities. Additionally as the io die shrinks as well be it to 7nm EUV or 5nm EUV, that will free up a greater degree of space on the AMX package, which in turn can facilitate the integration of HBMX or GDDRX or successor next-gen memory architectures on said package for L4/VRAM simultaneously

All of the above is undoubtedly existing in labs or in designs and is purely theoretical at this point for us, but they're all possibilities as linear scaling of performance and clocks isn't guaranteed even with die shrinks moving forward. So increased performance will have to come from scaling of raw throughput via cores and threads. It's speculated that AMD is looking to explore SMT4 for Zen3, which means that if they really do go down this path then SMT8 is the next step up and AMD would go down the IBM path where each core could have up to 8 threads. We'd start seeing Power9-esque architectures in x86-64 space by 2024 to 2025.

Intel is just one player in fab space. There's TSMC, Samsung and other fabs too. They supply both x86-64 AND ARM, both of which will take advantage of these new processes. Also, they need to get their own 10nm or 7nm node out before Samsung or TSMC moves down to 5nm EUV for mass production instead of risk production or both fabs will be ahead of Intel and then its over for them.

still an independent, country. you dog eating commie.

That's how Neoliberalism works. They build where it's cheaper, and sell where it's more expensive. Thus raising profits, that they then use to but their own stocks and inflate their value and thus their personal net worth. The poor get poorer, and the renters get to live like kings through these usurious means

ROC is literally the official name of Taiwan that the PRC doesn't recognize. Where do you absolute amoeba brains come from??

Because they ain't commie.

Long live Taiwan, Taiwan #1, fuck the CCP.

Maybe it has something to do with the price of labour over there

Trigate.

year old news wew dud what else is new chingos spy on their people oh my god no how could they

One Deal

Based.

Attached: this_triggers_hollywood.jpg (1140x699, 511K)

TAIWAN #1

First - Taiwan is not China
Second - Without Western mass production technology and processes there would be no Asian semi conductor industry. It is all Globalist geo-politics/economic decisions. The White Western Male is unmatched at creativity. Yellows have high average intelligence that is centered around the middle, they have lot's of bright people but almost no geniuses this is why they are a good semi conductor factory.

Could you explain that simply? Why do they call it 3nm if it's 22nm?

What is this font? It's the same one that seems to be used in all engineering and math related slideshows be they university courses or business briefs.