>'Ping' is reflective of the best case latency you're going to see between a thread running on two separate physical cores. There's tons of communication between cores related to multi-threading, etc.
Thanks, Cap'n Obvious.
What I meant was what it means specifically. Taking a cache line from another core? Pulling a cache line from core A to core B and back again? APIC latency? Something else entirely?
>this is Jow Forums not /v/ piss off
Discussing the factors that affect gayming performance is safely in Jow Forums territory.
you're also gay, so you should head over to /lbgt/
Maybe, but that's an orthogonal question.
the topology cannot tell the scheduler how to treat each core(s) with every load.
Just remember the infamous windows 7 scheduler patch that gave Bulldozer's CMT implementation a 5% performance jump.
Don't forget that SMT and CMT have shared resources with their physical partners, placing the wrong load on the "weak" thread, it can cause many more hazards and nops especially with FP instructions.
>What I meant was what it means specifically.
noone knows, those metrics are not valid unless AMD verifies them.
There are several cases where you should check the latencies,
cross-CCX cache r/w
cross-CCX context switching
data forwarding from one core to another core on the other CCX.
...and even then you won't have a clear picture, because all those latencies are eliminated with a simple scheduler patch.
>excuse me
you are excused.
>the topology cannot tell the scheduler how to treat each core(s) with every load.
That's exactly what it does. It's the whole point of it.
>Just remember the infamous windows 7 scheduler patch that gave Bulldozer's CMT implementation a 5% performance jump.
That's because AMD's topology description of Bulldozer presented each "core" as an independent core, which is kind of understandable since the standard description format has (or had) no conception of CMT. Zen however has no such exotic attributes so it fits nicely into the standard topology descriptions.
>the "weak" thread
There is no weak thread. Both threads of a core are symmetric.
>noone knows, those metrics are not valid unless AMD verifies them.
It's not AMD's graph.
>dual core shill
t. 2008