extremetech.com/computing/253248-amd-threadripper-delidded-multi-core-surprise-hood >If AMD were offering Threadripper with just two cores active in every CCX, it would probably help with hot spot formation and allow AMD to selectively choose the very highest clocking cores. Instead, we’ve got a situation where it apparently made sense for AMD to mount four cores, but only activate two of them.
>go buy a CPU that is twice the size compared to normal ones >half the fucking dies in it arent even activated >the actual working part of the CPU is about the size of a normal CPU >get absolutely fucking jewed because its bigger for no reason
>being so desperate to find flaws in a product that you actually complain at the form factors, even though it's completely irrelevant The state of Intel in the year of our Lord 2018.
Tyler Flores
But you are paying for 32 cores. You paid for the package and it has 32 cores. AMD is just screwing you by having 16 of them turned off.
Jaxson Howard
OH SHIT, have I traveled back in time, AGAIN??
Ryder Stewart
>Still get 128 PCIE lanes, fucker. >Still get charged for 16 cores. Meanwhile Intel is miles from beating that thing on price/performance ratio. I suspected it from day one. AMD could have a 1990X, but they didn't. Now 12nm helps it become more realistic. Prepare for 48 cores Threadrippers 3, 1.5 years from now
Zachary Evans
Who says there just “turned off”? There most likely just dead dies again used as spacers so they can use the same assembly line as the epyc CPUs
Carson Jones
good goy, just buy a new mobo every year instead of getting threadripper, goyin!
Caleb Rodriguez
No, the 2 disabled cores are retard ones that are just there for the PCIE lanes. They wouldn't work, even for a 1300X, but that way, they're useful. This way they use all their waffer and get insane yield, unlike some competitor.
Charles Morris
The 2 dead cores I doubt are even used for PCIE lanes as 2 Zeppelin dies are good enough for the 64 PCIE lane sfor threadripper. Eypc with its 4 active Zeppelin does has 128 lanes
Noah Howard
Well, from day 1 I was doubtful. Ryzen has 16 PCIE lanes. But TR has 64 with 2 dies??? Help me with my math.
Hudson Reed
so it is literally 4 cpu's glued together. wow. I can't even defend as somewhat an amd fanboy
Luis Sanchez
Well, it's good glue. Intel will persist in monolithic cores and die is a spoiler for the next 5 years.
Hunter Howard
they also need the larger package because of memory and pcie lanes afaik
Jeremiah King
AMD has confirmed they're not even dead dies, they're dummy dies entirely. Simply spacers put in place.
oh wait you thought we didnt already knew that they 2 ccx's were dummies right user?
Ryder Gonzalez
i love amd
every time they come out with a new CPU, i can go buy the new intel stuff that they release
Jason Long
Ryzen dies are cut down, a full Zeppelin die should support 32 PCIE lanes and if you look at Epyc which uses the best of the best dies they have there full 32 lanes per die and so does threadripper.
Camden Green
Post tfw they can make 64 core threadrippers for 7nm
Aaron Roberts
They aren't even dead dies. This is all intentional. The interposer is designed to support 4 compute complexes but only 2 are used in many consumer SKUs. The dies that are non-functional (quality rejects) are not placed here. These go to the garbage bin or metrology/yield analysis for further study. What is on the chip are metal spacers with no etched silicon on them. The size of the overall socket and chip is intended to support 4 total CCXs, and it would be unreasonable (jewish, as you put it) to make you buy a different sized and pinned socket for each possible combination.
OP is spreading what is, at absolute best, total FUD and should neck himself immediately.
Jason Jones
should i return my threadripper 1900X?
Aaron Moore
>need spacers so that the ihs and heatspreader on top of it distributes its weight as equally as possible >ideally the spacers would have the same height, material, thickness, etc as the dies >buy spacers for that very purpose >or use dead dies that you have laying around by the thousands and happen to be the exact size and material that you need
Chase Allen
Isn't 128 PCIE lanes reserved for dual socket servers?
Eli Lopez
Why did you buy it in the first place?
Jonathan Campbell
This is why discrete GPUs are dead in the not-so-distant future.
James Foster
no its both 1/2
Blake Jackson
Actually each CPU loses 64 PCIe lanes when in dual socket. A single Epyc will give the full 128 lanes but if you install 2 in a dual socket config each CPU uses 64 of its lanes as interconnects between CPUs so you still get 128 lanes its just now you get 64 from each CPU
David Johnson
i thought it would be alot better than what i had because it was bigger
Owen Young
Lol no they're not. We're always going to have some manner of co-pro. If not graphics, we might be having TF co-pros for our game AI or whatever.
That's not how that works faglord. If you have a top bin of chips you can make X CPUs with that frequency or X/2 CPUs with that frequency. Threadripper is limited by thermals and power consumption.
Sack of shit.
Luke Rodriguez
>OP is spreading what is, at absolute best, total FUD and should neck himself immediately. No he's not? He's saying the die is bigger and laughing at AMD for it, which is true. The die IS bigger.
Kayden Carter
You get 128 lanes with Epyc regardless of a 1 Socket or 2 Socket system >but system I/O is identical to a 1S solution – half of the I/O lanes are used for high-speed links between the two SoC sockets.
Elijah Butler
>I don't know how binning works
Julian Gomez
16 available + 16 for chipset maybe?
James Cook
A wild guess is, you still get 128 lanes, but PCIe 2.0, because the connectors are there. Not a bad trade overall, but still.
Adrian Peterson
Sooo what’s the problem? You want to put a TR in your microATX box?
Landon Morales
Well, that would mean 48 actual lanes for TR, wouldn't it?
Nolan Walker
>Idiots on Jow Forums complaining about the build quality of a cpu that they have never used >They literally don't even know why someone needs a cpu like this Cute Jow Forumsayming babbies. Never change.
Jack Thompson
Nope all PCIe lanes on Epyc are gen 3, regardless of 1 socket or 2 socket
Nathan Barnes
You are trapped in the jew matrix where you think you have to buy an extra thing just because you've done it for 2 decades. Step outside that box and consider the computational implications of 64 cores with each supporting an extremely deep OoO execution pipeline. The data structures would certainly have to change to fit, but from a raw computational perspective there is more than enough to start considering pure CPU approaches.
Oliver Mitchell
>data structures would certainly have to change to fit Yeah but that'll be easy, right? Surely thousands of pixel pipelines specifically manufactured to work on RGB structures can easily be replaced by a beefy CPU which is already busy doing other stuff.
Easton Myers
>bigger for no reason Its that size and layout so it can share EPYC tooling. And they have more than enough crap dies come out to fill up those inactive spots.
Aaron Barnes
Everyone does it. They build one item, and bin based on performance. In this case if not enough cores meet standard they deactivate some and sell it as a lower core part.
Ryan Hill
The alternative is AMD playing the "a socket change a year..." game with TR, when they clearly had roadmapped TR CPUs with more activated CCXs (such as TR2).
The design clearly isn't future proof (e.g., you will probably need a new mobo revision with better VRM for any meaningful TR2 overclocking) but at least AMD isn't trying to fuck people over with a new socket for every new product generation.
Camden Hughes
Yes. EPYC can use all the 128 lanes, but those don't use an external chipset.
No. EPYC CPUs have 128 PCIe lanes, in 2-socket mode each CPU reserves 64 lanes for communication with the other one, so you still have 128 lanes in total.
Anthony Morales
>The design clearly isn't future proof How is it not? Look how much extra space they have.
Brayden Collins
Well, I still can't understand how TR has 64 then.
Evan Parker
No one ever said it was going to be easy. Absolutely nothing in this space is. That said, the advantages of an x86 CPU with modern instruction set are that it enables a much wider range of algorithmic approaches than a fixed-function pipeline can (aka your magic jew cards). You don't have to make nearly as many compromises from a development perspective to get your shit perfectly aligned with an x86 ISA as you do with a GPU. Deeply-nested recursive approaches (aka the most obvious and elegant way to do bi-directional ray-casting) work inherently on x86 without any strong concerns about blowing a stack. Recursion on a GPU is probably listed as an "anti-pattern" somewhere. Also, on your main CPU you have rape-fast access to main memory, and by extension, boundless virtual memory through your OS. You also have upwards of 4 layers of in-house caching on top of that which has been optimized over 3 decades to operate as efficiently as possible across the widest possible range of use cases.
Its not about easy, its about potential.
Alexander Long
Think of threadripper as just a half of an Epyc CPU because that is basically what it is. Epyc has 128 lanes so threadripper would have 64 lanes
Julian Carter
No you fucking idiot. When the dies are made and tested the ones that are dead are tossed and some work but all the cores don't. Those are these chips you talk about.
You are not paing for the die alone, you pay for working dies. This is literally nothing new.
I know, right! Then Ryzen is half a Threadripper and has 32...
Aiden Evans
Each die has CPU lanes and memory controller. In Threadripper 1 there are half as many dies as in Epyc, so half the channels and half the onnectivity.
Threadripper 2 could have all channels and all connectivity but AMD decided to not cannibalize Epyc sales. OR they probably are limited by motherboards right now which only have half the channels, just enough for TR1.
Landon Turner
>cringe.jpg I wonder how many people in this thread actually believe this is how shit works. Like not joking, honestly believe it. I used to think you guys knew your stuff, but as time goes on I begin to question just how competent the users are around here. It's probably the smartphone generation ruining it for everyone again. The kids who never lived in a world without wifi constantly penetrating their bodies. They dont understand the technology they use, much like I have no idea how the sanitation and water system works in my area, primarily because it was installed 50 years ago and everyone takes it for granted now.
Xavier Jones
Desktop Ryzen is low on the product hierarchy and it gets cut down dies that is limited to 24 lanes. It should have 32 lanes but only gets 24 because AMD bins them
Landon Perry
I was speaking more to the specifications they dumped on mobo manufacturers for TR1. For example, the 180W vs 250W TDP for 1/2 means the VRM on most existing boards is woefully inadequate to handle TR2 at higher voltages.
AMD could've originally set a higher standard for mobo manufacturers knowing full well they'd release 32 core TR with a higher TDP, but didn't.
Angel Morris
I'm OK with that math, but Chipset should be canibalizing some of those 64 lanes on TR. If only, for SATA connectors.
Dominic Baker
At least they didn't go full intel and require a new chipset to be installed every other month.
Isaiah Evans
AMD was thinking about newer higher core count CPUs when speccing TR motherboards, there is a reason AMD requires 8pin+4pin CPU power connectors when a single 8 pin would have handled 1st gen TR fine. You may not be able to overclock heavily but current gen boards can handle a 32 core TR
Brayden Martin
This was the first Gen you fucking shill. The new one has all four turned on.
Michael Robinson
so if i went out and bought a threadripper 1900X right now, would all the dies be used?
Julian Jackson
>Mfw AMD is literally 3DFX-ing their way to the top with 32c Threadripper
No because the threadripper 2nd generation with 4 active dies hasn’t been released yet
Connor Nelson
>Be 1999 >3dfx, once the crown of 3d performance, was being BTFO by Nvidilol with their GeForce 2 and AMD's R6 getting ready to drop >Both were in bed with all of the OEMs and Nvidia was using jew trickery to keep 3dfx out of the OEM market (sound familiar?) >3dfx having designed the VSA-100 chip needed to pay for the upcoming Rampage chip and all of the R&D associated with it >MOAR COARS >Voodoo 5 drops with 2 VSA-100 chips built on to the card >literally planned a 4 GPU Voodoo card called the 6000 with 128mb RAM, in 1999 >Filed Chapter 11 before they could finish it >Some final revision samples made it out of the factory >Benchmarks showed it was faster than not only the Geforce 2, but the later Geforce 3 Ti that wasn't released until a year later
The V5 and the 4 chip V5 6000 were the Hail Mary that came about 6 months to a year too late. You can thank 3dfx and all of their intellectual property for Nvidia SLI, since Nvidia bought up all their intellectual property and employees when they went tits up, AMD got a few employees too
Well this will be a 1500€ chip at least. The real deal is Zen2 where we'll most likely see 12 core mainstream. Then we'll see Intel bleeding again and releasing their 10 cores servers into the pleb market.
Liam Sanchez
Sincerely, thank you.
Fuck you.
Juan Lewis
ITT: people discover binning
Spoiler: intel does the same thing, your celeron could have been an i7
Austin Jackson
I come off of /v/ for one fucking second and I see several retards not knowing how CPU manufacturing works and talking out of their ass literally all lower tier CPUs in the same family, to put this as layman as possible, are just the same exact shit with more faults in them "turned off"
I dont know if I can get more simple/concise than that
wife works at intel
Kayden Perry
I may be old, but this doesn't flow. At least learn the technology. No way you'd get past 3DFX if you're even interested in 3D graphics. Sure, it's not taught in shool, but they're the foundation of what 3D graphics is now.
oldfags here were playing Quake 3D and Unreal on two Voodoo 2's in SLI attached to their 2D Trident or ATi Mach64 chip, in 1997
Brody Scott
Oh ok I guess I should just be born with knowledge of 3DFX and to learn it at any point is worthy of ridicule?
Angel Barnes
No, but the fact that you're ignorant of them, posting on this board tells me you don't know much about graphic cards.
Grayson Gutierrez
>Two Voodoo 2's in SLI Wish I had two.
Jace Flores
And so learning about them is a problem somehow...?
Evan Thompson
>having 16 of them turned off. Lying sack of sewage. Those are fused pieces of silicon.
Hunter Cox
Well, it's mostly you asking about it. It's like being French like me and asking wtf is the Revolution? It's that bad.
Christopher Robinson
>that are just there for the PCIE lanes. Epyc has twice the PCI-E of TR1. False. >Ryzen has 16 PCIE lanes. It may have more but it's limited by socket. Remeber, TR socket has 4000 pins versus 1333 of AM4.
Blake Campbell
It's not like that at all; 3DFX is not taught in schools, I do not have Jow Forums citizenship, and thousands of people didn't die when nVidia came around.
Julian Brown
It's OK to be young. You know, your testimony makes me think of all the ways younger generations just misunderstand and try to fuck everything up. Nothing new, they've been at it forever. They just don't know is all. The documentation is right there for them to grab, but they just won't. This applies to a lot of stuff.
Joshua Gray
No, unless you actually need more cores and threads. Enjoy your 64 PCI lanes and quad channel memory frend. >t. I bought one because I got a x399 MB for less than 250USD
