INTEL BTFO
10NM BTFO
7NM IS THE NEW KING
64 core cpu running at 4GHz all core
Mason Miller
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Easton Green
That's real powerful I wonder if it'll actually work
Xavier Wilson
>Out-of-Order execution with Compiler
Looks like a huge scam, pushing all the problems to the compiler just makes for compilers that are impossible to optimize
Everyone already learned this shit with VLIW.
Joshua Rogers
:22PM EDT - Multiple interested and engaged customers
06:23PM EDT - Integer Datapath is in place - currently limited by speed of SRAMs
06:23PM EDT - Q&A time
06:26PM EDT - Q: I feel like deja vu - at Hot Chips, Intel introduced VLIW-concept Itanium that pushed complexity onto the compiler. I see traces of that here. What are you doing to avoid the Itanium traps? How will you avoid IP from Intel? A: Itanium was in-order VLIW, hope people will build compiler to get perf. We came from opposite direction - we use dynamic scheduling. We are not VLIW, every node defines sub-graphs and dependent instructions. We designed the compiler first. We build hardware around the compiler, Intel approach the opposite.
06:27PM EDT - Q: You mention emulation for x86. What kind of penalty in performance? A: About 40% performance loss. Significant because our customer didn't want us to invest in that, as 90% of their software will be natively compiled by next year. It's a temporary deployment. Binary 4.0 GHz emulated still outperforms 2.5 GHz Xeon
06:28PM EDT - Q: How do you dodge the patents in place in this? A: We building a new beast. Our tech is significantly different. This is America
Anandtech sauce
Jordan Rogers
It's just RISC, not much different than ARM
Xavier Sullivan
>Out-of-Order execution with Compiler
is this a fucking joke presentation or actual slides? i can't believe someone with at least minor brain activity actually put those words in there on purpose
Kevin Fisher
They are making retardly optimistic claims without even working silicon. Fucking scam.
Leo Taylor
I don't think they're bullshitting, this silicon will actually exist, and will deliver the performance they claim.
The only caveat is in what software they reach that performance.
They can claim to out perform a Xeon core because their arch here is a massive vector processor. They're expecting developers to take advantage of highly ordered instructions with enormous execution requirements.
It'll probably find some niche uses like IBM's Z
Colton Watson
THANK YOU, BASED TACHYUM!
ALL INTEL, AMD, POWER, SPARC. RISCV AND ARMFAGS BTFO!
Josiah Harris
Not so fast
Fujitsu banzai! New ARMv8-A SVE banzai!
Elijah Clark
NEC showed off a new big boy vector engine as well. Big vector processor along with a scalar processor.
Has some devent performance vs an Nvidia card at a better price point.
Everything is super wide SIMD and vectors now.
Connor Lee
I'm going to sound like a brainlet for this, but aren't vectors just 3 coordinates? Why would that require massive computing power??
Leo Ward
tofu controller
tofu interconnect
Anthony Morgan
Its big brain shit for a certain class of instructions.
SIMD is a type of vector workload, but just a narrow subset with single instructions driving each op.
There are a bunch of different types of instructions you can run on a pure vector engine. Just like there are different integer and floating point instructions. Different approaches for accomplishing things yield different levels of time efficiency and power per op.
Brody Howard
>chinks lie
what else is new?
Grayson Perry
That pipe isn't to scale right? I'd be so sorry for them if they somehow managed to make integer/byte shit take as long as floating point.
Liam Adams
anandtech.com
This is probably the most interesting and game changing technology shown at Hot Chips this year.
The density, front end compatibility with DRAM, high density, good thermal characteristics due to materials, better throughput efficiency, this Nantube memory could actually replace all conventional DRAM. It might be the future of low power high bandwidth memory standards.
It would instantly kill off Optane, and may kill of NAND for storage.
Nah, thats not to scale showing pipeline stages. Its just the block features.
Joseph Cruz
Serious question: how relevant are the these chips without x86 support? Aren't these essentially limited to running Unix-like operating systems, thus limiting their usefulness as CPUs for desktop?
Charles Russell
No one cares about Windows when they're running a scientific workload or running a mainframe.
Noah Harris
>how relevant are the these chips without x86 support?
Very, just not for desktop applications, not using x86 allows them to avoid all Intel licensing schemes and produce the processor cheaper.
Camden Hall
Nah, the exact opposite and ARM proved that pushing those "problems" to the compiler is the correct answer. x86 on the other hand is a heaping pile of shit
David Morris
Aren't ARM's little cores still in order? The first ARMv8 A53 little cores were an in order 8 stage pipeline. Not sure if they kept with the trend.
Those were quite a solid and well lived design.
Jonathan Diaz
>ARM proved
Wat. All high-performance ARM cores are out-of-order.
Jason Morgan
They make in-order cores for lower-performance, more power/area-sensitive applications, like the Cortex-A53, and out-of-order cores for higher-performance applcations, like the Cortex-A57, A75 or A76.
Matthew Baker
>Out-of-Order execution with Compiler
>We are not VLIW, every node defines sub-graphs and dependent instructions.
>Faster than Xeon, smaller than ARM
Really sounds like snake oil, senpai.
Jaxon Perry
lolno, every fast ARM core is out-of-order
Evan Sanchez
TACHYUM
Aiden Morales
The little cores are in order.
Stop posting.
Dominic Garcia
>the little cores
lmao what the fuck are you going to run on those
Brayden Price
Scalar one data , 1
Vectorial several like one array or data vector [1,2,3]
Usually supercomputer begin vectorial data, take vector data and transform it.
Liam Jackson
Michael Bailey
>64 core cpu running at 4GHz all core
BASED AND REDPILLED
KIKETEL SHILLS AND THEIR DISEASED JIZZ GARBAGE CPUS ARE FINISHED
Benjamin Williams
>AyyyMD shill piggybacking off another company
(lol
Evan Martin
>unlimited write endurance
that's interesting
Angel Gonzalez
>DDR5
Aaron Lee
I bet this is what Hitler was using.
Jeremiah Flores
ARM, right?
Hudson Sanchez
oy vey
Elijah Walker
>4ghz
someone tell me i didnt time travel back to 2008
Liam Rodriguez
did you forget the 64 core part on purpose, intel shill?
Carson Cruz
did you have 64 cores all running at 4GHz in 2008?
Justin Butler
>4ghz
Anthony White
oh look, the intel defense force has arrived
William Martinez
A
FUCKING
CHILLER
Caleb Martin
>4000mhz
Asher Collins
Can someone explain very fast why are NM so important?
Oliver Jenkins
INTLEL SHILLS BUTTMAD DISEASED XEPOO ARE DOA FOR ETERNITY
Bentley Allen
pootel's future is so bright, it's like poo catching on fire
Ryan White
higher clocks without increasing power draw, or lower power consumption at the same clocks as before
Samuel Taylor
>
>tofu controller
>tofu interconnect
Ahahahhahahahh! Hory shit da funny!!!
Colton Moore
>4ghz
>prodigy
Kayden Wilson
>he does it for free
Aiden Williams
lol
Elijah Wright
it's just one salty intlel shill
Xavier Rogers
> (OP)
>Serious question: how relevant are the these chips without x86 support? Aren't these essentially limited to running Unix-like operating systems, thus limiting their usefulness as CPUs for desktop?
The person with the answers is always, and always be Alan Cox.
With a custom compiler, they will perform very well, for the exact task they are designed for.
They are not designed to run x86/Windows, but they will of course run linux.
IBMz? No, not even in emulation. IBMz has their own architecture
You see how the CPUs are arraigned in a grid? Any grid deeper than 4 wide, will be custom software. Massive pipeline. This is just a design spec, they are probably just doing first silicon, and its... crap.
You have a Knights bridge? Me neither, but I have a couple of dual Xeons.
btw, the Xeon core is *nothing* special, which leads me to believe that this is complete and utter hype. Xeons achieve they speed with larger caches. No magic
Jackson Reed
underrated
Justin Hill
the guy is probably protecting his investment, after taking a mortgage and investing it on intel shares
Jaxson Morgan
>banzai
kek
Daniel Robinson
>7nm
so we can expect to see it at like 2024?
Easton Lee
intel inst the only one that's going to release a 7nm node, son
Jose Turner
>m-muh 4 memehertz!!11
Nathan Fisher
>Tachyum
Triple six, five forked tongue
Subatomic penetration, rapid fire through your skull
William James
Desktop is irrelevant.
Jacob Phillips
Tachyon The Fringe, matey. GROOVY.
Carson Butler
>TSMC already fabbing 7nm chips
>GloFo ramping production in a month for 7nm
>Intel still sitting on broken 10nm
That's a real :thinking: kind of brane geneyus