What architecture is your favorite?

Because RISC-V is an open source ISA and implementable by yourself from scratch in a couple of days.

Using individual 74xx series TTL chips

teach me senpai

implementable in what way, software-defined and hardware-defined?

And all modern x86 processors are also RISC

Motorola 68000!

Elaborate?

Is there even any RISC-V hardware?

As of yet, there's only non-simulated hardware that are basically microcontrollers, but it seems to be chugging along well.

RISC-V is my favorite architecture.

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Not the user you replied to, but modern x86 processors convert complicated CISC instructions into simple RISC-like instructions called micro-ops.
Example: ADD EAX, [ECX + EDX*8 + 0x1234] will be broken into several micro-ops. One to calculate the address, one to load the data from memory, and finally one to perform the addition.

RISC-V and mips

uwu
youtube.com/watch?v=L8jqGOgCy5M

>linux shill dabs
owo?

RISC-V is the only acceptable answer. POWER is also acceptable because it doesn't have backdoors (although the designs are not open).

Yes:
sifive.com/products/hifive-unleashed/
Also see Adopters section:
en.wikipedia.org/wiki/RISC-V

Go big or go home
Most insane new core arch of HotChips 2018. Super interesting to read about.

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thanks mate

Real talk it's probably a Forth-based stack machine like the J1. Stack machines are the brainiac's architecture.

stack machines?

Architectures where you operate on a stack instead of registers.

How hard would it be to port all commonly used desktop software from x86 to RISC-V?

what particular advantage does that give? does it operate programmatically similar to a register based architecture?

>spend time recompiling dozens of programs
It'd be less man hours to just build a decent emulator.

About as hard as you get thinking about it.

This would be quite an undertaking though as RISC-V has a much smaller instruction set than x86 and you'd pretty much have to build everything from the ground up unless you're starting out on GNU/Linux. There's a reason you don't see any ARM based desktops (aside from raspberry PI type computers), and even then they aren't very powerful or very fast. Considering RISC-V doesn't ship with an FPU you'd need an expansion or an FPU included with the motherboard/system you'd be running all of this on if you expect any decent performance for intense computational workloads (Rendering, Photoshop, Gaming, ETC.). Think early android phones in terms of power/usability. That's where RISC-V is currently. That's not to say it can't improve or isn't possible, just seems unlikely to usurp x86 in the next 5 years.

Qualcomm actually has a dedicated ARM desktop chip coming out now just for the record.

Surprising, I'm curious how they plan to market it.
And on a second note, I want to clarify RISC-V may not become the default or "NEW" desktop arch, but it will likely be used for motherboard microprocessors, used in graphics cards, phones, and specialized hardware.

>This would be quite an undertaking though as RISC-V has a much smaller instruction set than x86 and you'd pretty much have to build everything from the ground up unless you're starting out on GNU/Linux.
No, you don't have to build stuff from the ground up. That's why we invented portable programming languages like C and don't programm everything in native assembly.

>There's a reason you don't see any ARM based desktops (aside from raspberry PI type computers), and even then they aren't very powerful or very fast.
The ARM inside a Raspberry Pi isn't powerful or fast, because it's low cost, not because of an inherent limitation of the ARM or other RISC architecture.

>Considering RISC-V doesn't ship with an FPU you'd need an expansion or an FPU included with the motherboard/system you'd be running all of this on if you expect any decent performance for intense computational workloads (Rendering, Photoshop, Gaming, ETC.).
This is false. RISC-V instruction set has a modular design so you can have a low power RISC-V microcontroller without an FPU that doesn't need it, but the full featured RISC-V meant for servers and workstations has FP instructions.

Beyond that there's already work to port everything to RISC-V. I agree that it will take more than 5 years for RISC-V to supplant x86, but I do think in less than 5 years we will have competitive RISC-V based personal computers.

>No, you don't have to build stuff from the ground up...
I'm talking about the majority of Windows based software that is closed source.

Either way, I would very much like for RISC-V to make it into the desktop/laptop realm, I'm just hopeful it can survive, one of the largest issues with switching PC architectures that sways consumers and businesses is backwards compatibility and portability of software to the new arch. Personally, I'd like to see some development on a JIT compiler for x86 software to run on RISC-V, as that could help push progress a little faster and makes it slightly more appealing for companies and individuals that want to run the same software they have been using for the past 10 years. (Often custom made or expensive and they don't want to switch due to cost, effort, etc.)

So do all the "RISC" architectures, funnily enough. Microoperations don't make you RISC, your ISA does.

SPARC and Elbrus

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MIPS is my favorite, with Alpha being a close second.

MIPS is pretty much irrelevant now outside of some embedded applications but I look back on it quite fondly when I think of Silicon Graphics. Their MIPS implementations weren't too exciting but the hardware that was paired with it and all of the software running on it was 10/10 at the time. The MIPSPro compilers were heavily optimized which made complex and heavy software run even better.

POWER is interesting. Like x86 it draws a lot of power but it's not insecure trash. I'm thinking about getting a Talos II Lite as my main workstation. The software support is okay and POWER9 chips are incredibly powerful. I hope they become a little more popular with hobbyists in the near future and that we might see POWER9 workstations drop below $1000 as a result.

No. ARM is just another RISC architecture. Look up RISC vs CISC.

x86 is a proprietary cancer that's full of backdoors and other vulnerabilities due to glow in the dark tampering and general incompetence and/or shortcut taking. It's also filled with worthless legacy instructions so that companies can run spreadsheet software from 1998 to save 10 cents. RISC on the other hand is easier and cheaper to develop, which means companies can sell you RISC machines for less, or put that money into making the hardware better in other ways.

The only good CISC architecture aside from VAX.

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>And all modern x86 processors are also RISC
That's incorrect. The ISA should not be defined as the sum of all of the silicon in the CPU. It's the architecture that's exposed to the user. It's not like the user is able to make and run these programs directly on that hidden RISC part of the processors, so why even bother talking about it? You can only run x86 software on these machines regardless. Having the processor translate the instructions internally doesn't magically make it a RISC processor.

Now if Intel or AMD would remove these translations and allow people to program for whatever the architecture underneath is, then you'd have a RISC processor.

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unironically based and redpilled
Jow Forums is fucking retarded now

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There's actually lots of silicon already out there. SiFive is shipping boards. I'm currently working on my own version with a lot of custom SIMD instructions.

I kinda wish their LLVM tree was a bit more mature because modifying a processor in GCC is a pain in the ass in comparison.

Isn't x86 just an instruction set for CISC processors

the RISC-V standard only species the ISA and the ABI (if you so choose to follow the ABI). You are allowed to implement the hardware however you like. Obviously you know your hardware is fine if you can compile RISC-V applications for it and they're functionally correct.

*specifies

>it doesn't have backdoors
>the designs are closed
pick one faggot

Z80. It's comfy but not too comfy.

Mos6502 all day every day

Wth are you talking about. You are referring to micro instructions, that not makes a processor a RISC one.

It only stores the internal steps to accomplish some complicated instruction.

Just to object a bit, while you can indeed say that x86 is a CISC, it does get the best of both worlds (the code compactness of CISC and the performance of RISC).

x86 instructions are translated to propietary microcode that is usually of a RISC nature

when will the Mill save us

Yes, take the Z80 redpill. Soon, the whole world will be running on MSX Someday...

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RISC-V is the only chance of ever getting an open non-botnetted desktop computer. I know that people like nvidia and intel are only supporting it for their own ends and are going to shit it up with proprietary extensions, but it's still better then nothing. Since RISC-V is going to be the future and also our only hope, it would make sense to preserve Terry's legacy by porting Temple OS to it.

github.com/Byzantian/TempleOS-V/issues/1

Are any of you interested?

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I hope not, the sprite limit per scanline is quite bad.

VAX and MIPS

Was TempleOS ever open source?

Nigger, it's public domain and everything is jit. There is almost no binaries, everything is just HolyC source files. It can literally compile itself.

proprietary extensions don't really matter. Just don't pass those options to the compiler. Instead, help develop open extensions for risc-v and DO compile for those. The custom instruction space is open for anyone to throw their custom stuff into, whether it be open or proprietary instructions. Standardized instructions can never occupy that space, but you can still have something commonly adopted put there.

You're talking down to him like TempleOS isn't an absurd piece of software that somehow works

I love me some SPARC.

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SPARC

x86 because it's what plays muh games

Anything that requires SSE3 and up is quite shitty.
x86 was much better when it was just MMX.

None of these.
RISC-V.

>You're talking down to him like TempleOS isn't an absurd piece of software that somehow works

Could you imagine what terry could have done if he wasn't crazy? Like, thinking about it hurts me. The guy was actually a genius.

68K is nice. A shame they aren't made anyone.

Some still are. And some are sold at precious metal prices -_-.
This is why I got a V500v2+ for my A500+, rather than else.
I do not intend to use the AGA replacement in Gold3, but I'll get the FPU version instead, if I have a choice..

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POWER == Performance Optimized With Enhanced RISC

I hope you're not implying crazy and genius are rare. Look up like 70% of mathematicians like the guy who proved there are more numbers between 0-1 then natural numbers between 0-oo.

Risc-V is mostly a meme ISA that hardware manufacturers can standardize on for embedded (proprietary) processors running proprietary firmware, while hoping open sores developers implement good GCC support for it and other companies don't sue them for using patented ISAs.
There are like a million open source ISAs out there, the issue is producing a decent die design and getting enough demand for it to be profitable for a fab to actually make an open-hardware CPU.

While that's true, it's good to have several companies and working groups focusing on an ISA in order to improve standardization and adoption. It's up to people that implement the ISA to create a completely open core and chip (release the the GDS, verilog code, etc. for inspection). People here don't do much research into this and assume that "open source" means the hardware itself is completely transparent and botnet/backdoor-free, yes, and this is rather misguided. But there is nothing stopping a real effort from forming to actually produce one of these chips. It just won't be easy.

you sound like you don't get why RISC-V is a big deal

And to add to this, RISC-V has some merits. One, it was designed to provide a lot of encoding space for custom (proprietary or open) instructions. Two, it was designed to require very light-weight decoding hardware. It's like MIPS without a lot of architecture-specific bullshit. It's a sound starting point for a competent core, and I wouldn't call it a meme at all.

You have that completely backwards. You're the one who doesn't understand why RISC-V isn't a big deal.

Please elaborate for us then, user.

That sentence alone just hurt my tiny brain

MIPS is so cute and good.

I'm not the user, but RISC-V is a big deal because if you wanted to design your own processor that would work with existing software before you would need to pay a lot of money to license an ISA (from Intel/AMD/ARM, etc.), especially if you wanted to make your processor designs publicly available such as with open source designs. RISC-V is a well-designed, future-proof, extensible ISA which does not come with any licensing costs, so anyone is free to design a processor for this ISA, and since RISC-V has already generated a lot of interest and backing in academia and industry, your processor is going to have a whole software ecosystem available for it. Going forward you should always prefer RISC-V because this is the only ISA that offers a viable path to truly open source hardware designs.

I'm that user, and this

8086

>you should always prefer RISC-V because this is the only ISA that offers a viable path to
You can make your transparent sophistry work for software - open sores can be, and often is, intrinsically worthless - but it doesn't work for hardware, which are real things, with real costs involved.

having fos hardware allows you to, for example, write drivers for it without official support from the vendor
how new r u?

>im such a tard "official support from the vendor" to write a driver
>which makes sense, cos i cant even write coherent English
Begone, moron.

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The problem is that only proprietary hardware developers will actually USE the ISA for free, while outsourcing the effort of writing a good compiler to open source developers for free. And all that to create more PROPRIETARY hardware. Open source devs will be subsidizing companies like novidya, while thinking they're helping bring open hardware a little closer to reality. Think about that for a second.
The ISA is only like 1/10th of actually having a working CPU that can even remotely compete with proprietary alternatives. You have to design the logic that will run the ISA at a decent speed and you have to get a deal with a reasonably equipped fab beforehand to even get access to the design rules just to begin to adapt the logic to the actual silicon. And then you have to do all that for a non-exorbitant price so people actually buy the stuff and you didn't just drop a couple million dollars in the trash (and hope you break even before other chinks begin making chips based on your open-source design for cheaper).
It's just very hard to make it happen. *If* it somehow happened, then the ISA wouldn't matter much, because any neckbeard in his basement can help write a GCC backend and use it to port software to whatever ISA the CPU used. But not anyone can make CPUs in his basement.
It would be better if an open hardware initiative was based on an ISA that was licensed in a way that hardware companies couldn't embed it into their own designs, making it cheaper for them to cuck us in the process.

>but it doesn't work for hardware, which are real things, with real costs involved
Open source absolutely does work for hardware. Processors are designed using an HDL (hardware description language) like Verilog. Once you have a design, specialized software processes it to produce a digital file that can be sent to a semiconductor foundry where they will make a processor for you based on your design. You have to pay them obviously, but what you get is the processor you designed, and the more of it you buy, the lower the per unit cost. There's quite a few people who are interested in an open source processor like this, rather than a black box processor like anything coming out of Intel or even AMD.

It's his craziness that enabled him to do such a feat. There are some damn talented people out there, but they have no inspiration or anything moving them to do such things.

I thinkvwhat he's getting at is that this isn't something an everyman can get into using just their PC as is the case with open source software projects; the fact that this is open source is of little help to anyone except those with the money to fab

personally I don't agree with this sentiment because I use FPGAs extensively, but I agree that if making silicon was the only option you'd be fucked

>*If* it somehow happened, then the ISA wouldn't matter much, because any neckbeard in his basement can help write a GCC backend and use it to port software to whatever ISA the CPU used.
Before you start designing your open source processor, you need to know in advance what ISA you're targeting. It's not going to be one that has licensing costs like x86 or ARM, so before you even begin to design your open source processor you need to design an ISA, which is not a trivial task despite what you might think (so why not go with RISC-V which already exists and is actually well-designed?). Once you've designed your open source processor, you might want to test it by instantiating it on an FPGA, but if you didn't target an ISA that already has a robust software ecosystem, now you have to get into writing a whole compilation tool chain for your new ISA (why not just leverage what's being developed for RISC-V?).

It won't usher in some golden age of open sores hardware - no, it'll be "tivoized". Manufacturers use binary-blob firmware because it makes hardware cheaper. RISC-V won't magically change that.

This is something the likes of you don't understand. While everything you said is correct, it's also irrelevant. Big manufacturers will happily shove weird/incompatible/undocumented extensions into the silicon, to say nothing of the firmware blobs required to run them. And if you try to put in GPLv3-type provisions, then nobody will touch your shit. You might be a talented engineer, user - but as a businessman, you're a drooling fucking retard.

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doesn't mean they can't release recreatable firmware.

>so before you even begin to design your open source processor you need to design an ISA, which is not a trivial task despite what you might think
Actually it kinda is. And all ISAs evolve with time, so it wouldn't have to be set in stone.
>now you have to get into writing a whole compilation tool chain for your new ISA
Writing a simple compiler good enough to run test programs is easy, writing a good optimizing compiler is the hard part.
>why not just leverage what's being developed for RISC-V?
Because you are helping the enemy when you are already at a huge competitive disadvantage.
Look I'm not saying you should NOT use Risc-V, I'm just saying it's not all sunshine and rainbows and there are reasons to be suspicious with all the shilling that has been done precisely by hardware companies.
I doubt they would be so enthusiastic about something that could actually compete with them and bring an alternative to their shit.

>And if you try to put in GPLv3-type provisions, then nobody will touch your shit.
Except parties interested in selling open source hardware to people who are willing to pay a premium.

>I doubt they would be so enthusiastic about something that could actually compete with them and bring an alternative to their shit.
Maybe because what the alternative is (x86, ARM) isn't any better financially nor technologically.

RISC-V MIPS and CELL.
Yes I know CELL was a flop. I still think it could have gone so right.

POWER and MIPS

Cell was a good thing released at a bad time. I wonder how big it'd be if GPGPU hadn't gotten big at the same time

Based and redpilled

One instruction set computer (OISC) is the one true architecture. Anything else is for brainlets.

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