In a risc-v processor with 32but registers, I have some odd behaviour:
12_{10} * 0_{10} = 00000000_{16}
but if I switch the multiplier and the multiplicand, this happens
0_{10} * 12_{10} = ffffffff_{16}
Can anyone explain why this happens? Wouldn't 0*x = x*0 = 0? Thanks!
This makes no sense
Does seem peculiar. Cant find anything in the spec about it
I'm nog familiar with RISC-V asm but maybe your numbers are being processed as signed or floating point numbers when you flip the order.
riscfags finished and bankrupt
this is what happens when you use open sores hardware
You're on the wrong board. This is the board for corporate shilling and desktop ricing threads; nobody here will be able to help you.
Where did you buy it and how does it work OP? Can we see pics? I've been interested in these things sense I've head of them a couple days ago
Give a sample binary and the core on which you're running it
The upper and lower bits are stored in two different registers right? What's the upper bits look like
>32 bit
lol use 64 bit moron it lets u use more memoryu!!!
that's it, happy gaming!
Is that floating point?
Floating point format being:
Sign exponent fraction
If it's evaluating to"negative zero" it might look something like this
1 11111 000000
And maybe it's storing the upper bits in the register?
Wait, how does storing the upper bits in the register make a difference? The upper bits of what - the answer?
Yeah I'm not familiar with this architecture, but pretty often when you do a multiply the answer will be stored in two registers because it's too big to fit in one
For example in a 2-bit register system
2*2 = 4
10 * 10 = 01 00
The answer would be stored in two registers containing 01 and 00 because 4 (100) can't fit into one
In this case if the answer is a floating point number instead of normal binary with 2s compliment negative numbers, the upper bits specify the sign bit and the exponent bits and the lower bits are a fraction that is raised to the exponent bit
So what might be happening is you're looking at the upper bits which are all 1s, and the lower bits might all be 0s if you checked.
In the case that the lower bits are all zeros that would mean it is raising -0^(some number) which is equal to zero and that would make sense of your situation
I'm not sure though, this is my best guess
And them being different wouldn't matter in that case, the reason they are different would probably be due to the way multiplication is implemented
Awesome, thank you.
Is there any way I can find EXACTLY how the multiplication on the RISC-V processor works?
t. brainlet who offered no advice either
I think I found something:
MUL performs an XLEN-bit×XLEN-bit multiplication and places the lower XLEN bits in the destination register
But this still doesn't explain it?
Post your assembler you goof!
This, it would be easier to understand what you are doing and what might be wrong
Look up the documentation
RTFM. This isn't plebbit. Down vote me, hoe