For the real 3600, all the active cores wont be on the same chiplet. The demonstration was fundamentally unrealistic. Maybe it shows how the 3700 will perform when running just one CCX.
Here's what you faggots didnt think about though
Mason Watson
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Kevin Hall
So you're saying the 12c and 16c parts with two compute chiplets might not get 100% performance scaling for all workloads? Oh, the horror!
Elijah Edwards
Wew oh no save me from the SMT jew only getting 90% scaling from my other 8 cores when all 32 threads are working on the same task
AyyMD finished and bankrupt
William Stewart
>all SKUs with have two logic dies
>8 core SKUs will be 4+4 ot 2+6 between two dies
No.
Nice FUD though. Almost as good as the nigger who tried convincing everyone that Zen would only have single channel memory bandwidth.
Michael Brown
>this is what intel shills actually believe
John Martinez
>Shows real demo
>unrealistic
What a massive faggot you must be in real life. You can turn cores off and turn this into a duron if you want without smt. They showed one chiplet for this, and 4 for EPYC, so the binning is logical. Even better, if it's the exact same die as EPYC this is a huge thing, because that had 16 per ccx, then that means Intel is mega fucked, and they gimped their single chiplet by disabling HAD THE CORES.
Imagine them releasing the 32 core version and 8 cores is the new ryzen 3..
Anthony Ortiz
EPYC 2 is not 16 cores per die. It is 8x8 core die, with 2x4 core CCX per die.
Evan Sanchez
name of her on the right? she is the most beautiful person I have ever seen
Christian Turner
the exact opposite is true actually. AMD will only put one chiplet in for Ryzen 3 and 5 chips and shave 50$ of the BoM instantly, and undercut Intel even harder than before.
There's no reason to actually use two dies on every single chip, since they don't need to load balance the lid like they did for threadripper.
Ryzen 7 and 9 will have 2 dies though, and balance the cores across them.
Juan Barnes
Nipnong nipponga, ur welcome
Brandon Cruz
but i did think of that
Mason Jackson
Alternatively, the CPU that was shown was not the CPU that was tested.
Camden Harris
No shit.
This is already the case with Threadripper, and it'll be fixed through software (having processes run on the chiplets that have direct access to the memory they're using)
Juan Powell
man fuck this shit, I hope that 3600 will have only 1 chiplet so I can get away with having 32GB of cheap RAM that I bought a few years back
Jackson Taylor
>(having processes run on the chiplets that have direct access to the memory they're using)
But with the IO die every chiplet should have equally bad access to the memory
Brandon Johnson
Of course I thought of that. I'm of the opinion that the room for the second chiplet is where the iGPU is going, for some pepper spray in Intlel's eyes after the CES demo blackened them.
Yes - the fucking ES is half a Ryzen 5 3400G. Now go cry in into your pillow more.
James Hughes
Music BNK48
Jacob James
This
4+4 core performance will turn to shit
Connor Turner
Jayden Peterson
Lol, what are they going to do with defective dies, throw them away? Keep your day job, business isnt for you.
Levi Foster
Connor Diaz
Athlon
Brody Torres
Nope, AMD said there won't be chiplet iGPUs for Matisse, so the left over space is basically guaranteed to be another CPU chiplet.
Jace Bailey
That's what consoles are for, maybe you need to freshen up on your business knowledge their M8.
Daniel Reed
Something's amiss in the reflection on those chiplets
Noah Butler
Consoles APUs aren't MCMs built with reused desktop/server components, Adored. Stop speculating.
Brayden Wright
I don't think they actually have any actual defective dies.
everything AMD's doing from now on is MCM dumbshit.
Aaron Torres
>everything AMD's doing from now on is MCM
No, only mainstream CPU Ryzen and EPYC are MCM.
Zen2 APUs are monolithic designs.
Console APUs are also monolithic designs, and include proprietary IP from their client customer, they are not off the shelf reused parts put on a generic package.
You're a shit eating moron, Adored.
>I don't think they actually have any actual defective dies.
hurr durrr 100% yield!
Brayden Sullivan
>she is the most beautiful person I have ever seen
user, I...
Dominic Martinez
>and include proprietary IP from their client customer
Point us towards some, or this is bullshit.
Juan Diaz
The stopped doing 2c chips last generation, it wouldn't be a jump for them to stop doing 4c chips this generation.
Connor Thompson
They wouldn't spend a whole IO die just for two or three usable cores.
Samuel Evans
It was a head to head core count comparison.
Liam Reed
>I don't know what AMD's semi-custom business is
Why are you here? Tons of media covered the design cycle of the last consoles. S|A has huge write ups on the DSPs and random shit Microsoft had added to the Xbone.
Aaron Wood
The iGPU will directly go into the IO die. It's simply too big for only one or two chiplets and dual channel memory.
Which means that perhaps every Ryzen 3000 chip will have a Vega iGPU.
Another possibility is a copy of the L3 cache, but it's pointless for only one chiplet.
Tyler Young
>a new node has 90% yield
Gabriel Miller
>80mm2 cpu has low yields
Lucas Cooper
William Parker
>Consoles APUs aren't MCMs built with reused desktop/server components, Adored. Stop speculating.
The fact that Ryzen 3000 is now confirmed to use chiplets makes it obvious the consoles will too, since it massively increases the volume of 7nm chiplets to speed bin and allows the salvaging of virtually every defective die.
It would make no business sense whatsoever to go 2/3 the way there but not the whole way there with chiplets.
Oliver Morgan
7nm is actually a really big die shrink, their yields are going to be way better. Those chiplets are absolutely tiny, the amount of errors they're going to have is very small. And any chip that cant do 6 cores is just going to become an athlon or trash. The chiplets are basically a normal zen+ 4x2 CCX configuration with avx 256 and without all of the IO. They're literally cheaper and have a better yield. many smaller dies have less of a chance to fuck up than a few big ones.
Also not to mention that the current 4x2 CCX works so well as it is, AMD would be completely retarded to move to twin dies on all chips. There would be no point.
Jaxson Morgan
Doubt. Thats way more work than they would ever need to do. Not to mention the IO die is going to be based on epyc and you know they're not shoehorning in graphics chips on server IO dies. Next gen APUs are definitely going to be a chiplet and a GPU chiplet, but considering current gen APUs just got announced, they're not gonna happen till next year.
Chase Sanchez
>For the real 3600, all the active cores wont be on the same chiple
Yes it will, you retard.
It's cheaper for them to use the lower binning 8 cores which have all 8 cores working but not at tight voltages than it is to use two dies and deactivate 8 working dies.
Holy fucking shit. How are you this stupid?
Only thing I think might change from the leak is that Ryzen 3 might be 6c/6t in order to sell more Ryzen 5s, instead of 6c/12t. And I don't think there are going to be 16 core parts because they are 105W TDP max. But it does appear that we're looking at 5GHz turbo on 4 cores on a 12 core for the 105W TDP chip, given that the R5 2600(X?) 8c/16t 4.5GHz and presumably ~4.1 all-core was a 65W TDP part.